R&D Engineer, Sr I

Engineering      ·        INDIA – Bangalore      ·       Full time

Job Description and Requirements

Sr. I R&D Engineer, DFx Hardware –

Our Silicon Lifecycle Management (SLM) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.

Job Descriptions & Requirements

Part of the rapidly expanding Hardware-Analytics and Test (HAT) business unit, a DFx Hardware engineer works on DFT activities of various Sensor, Test and Debug IPs as part of HDG (Hardware Development Group) product portfolio. The DFx HW engineer will understand Test requirements of new IP products as well as understand existing products and enhance them for better Testability, Automation friendliness and post-silicon characterization. We are seeking an experienced, highly motivated and high-caliber individual to build these differentiating DFx & Sensor/controller products. This individual should have strong technical experience in DFT, timing and post-silicon characterization. Additional responsibilities include:

• Work on DFx/Sensor development projects in HDG-India
• Understand business priorities and break it down into technical tasks
• Understand existing products at lower levels and identify enhancement opportunities / cost
• Look ahead into future opportunities and help create a technical roadmap for the IP
• Deployment of new sensors into test chips and post-silicon characterization

Job Requirements

• Architectural and forward-looking thought process
• Sound knowledge of DFT, frontend digital design and backend implementation
• BS or MS degree in Electrical Engineering with 5+ years of relevant industry experience
• Exposure to architecture, design or verification of DFT, Test & Debug IPs
• Exposure to architecture, design or verification of PVT, Ring-Oscillator, Mixed-signal based IPs
• Excellent teamwork, communication and interpersonal skills with both internal teams and external customers

Preferred skills:

• Strong exposure on DFT tools and methodologies like Scan, BIST, IST, Debug.
• Exposure to DFT automation platforms and flows like TestMAX, Tessent etc.
• Backend implementation exposure in STA, P&R and RTL2GDS ASIC flows.
• Experience with micro architecture and design of small to medium sized digital IPs
• Knowledge of one or more AMBA protocols: APB, AXI etc.
• Experience in DFT/DFx technologies, PVT-sensors and related concepts is a strong plus

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

Job Category: Engineering
Country: India
Job Subcategory: R&D Engineering
Hire Type: Employee

Please click here to apply.