Advanced Retinal Imaging AllianceARIA Company Logo Rochester NY Neurotech job opening

Electrical and Computer Engineer for Applications in Retinal Imaging and Vision Science

 

Electrical and Computer Engineer for Applications in Retinal Imaging and Vision Science

 

The University of Rochester Center for Visual Science / Advanced Retinal Imaging Alliance (ARIA) is seeking an engineer to develop advanced data acquisition and image processing systems for applications in vision research. An ideal candidate would have experience in instrument control, user interfaces, programming hardware, image acquisition and real-time processing.

The successful applicant will join a collaborative team of vision scientists and engineers that design and deploy imaging systems to study vision and the eye including: retinal imaging, eye tracking, ocular imaging and microscopy of living systems. This work is directed both at advancing our understanding of the visual system and the development of novel therapies. The Center for Visual Science is leader in adaptive optics scanning laser ophthalmoscopy (AOSLOs) for high resolution retinal imaging and developing these instruments will be one focus area for this role. Background in vision science is not a requirement. The successful candidate will have considerable independence, and should be a team player comfortable working in a vigorous, fast-paced and exciting research environment.

 

Preferred  (But Not Essential) Qualifications:

  • Experience programming hardware device drivers based on 64-bit Microsoft Windows and optimization of hardware interrupts.
  • Experience with nVidia GPU parallel programming with native CUDA C language for real-time data processing and system control.
  • Experience with frame grabbers and video/digital data acquisition boards such as Arduino, LabView, National Instruments, Texas Instruments, Matrox. AMD, Xilinx etc.
  • FPGA programming experience with VHDL or Verilog languages (for example mechanism of PCIe state machine, machine-level access & control of video chips and other chips such as DAC, ADC, SRAM, and DRAM with bus protocols such as SPI and I2C, ultra-fast FPGA clock management, management and optimization of FPGA resources such as flip flops, arithmetic logics, LUTs, and block RAMs.).
  • Interest and enthusiasm for engineering to advance research in neuroscience and medicine.

 

The start date is flexible – March 1st or as soon as possible thereafter preferred. Interested applicants are welcome to contact Jesse Schallek to discuss the opportunity informally, or to apply please send a CV, cover letter and a list of three referees (within the cover letter itself) to Debbie Shannon

 

Applicants from diverse backgrounds are encouraged to apply. The University of Rochester is an equal opportunity employer.

 

Please click here to learn more.

 

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