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Chiplet Solution Architect for HPC/AI

 

Chiplet Solution Architect for HPC/AI

Research & development             ·            Leuven           ·          Full time

 

Enable chiplet-based zetta-scale HPC/AI system hardware prototype based on RISC-V architecture

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What you will do

The Compute System Architecture (CSA) unit at imec desires to build RISC-V based zetta-scale AI/HPC hardware and software solutions co-designed. We are backed by a broad in-house R&D expertise, creating a new AI computing paradigm that will move the industry forward for many years to come. Designed in tune with advanced silicon geometry, novel communication technology, our architecture provides high-performance AI computing solutions in reliability, security, and power consumption at scale. We analyze emerging usage models, build hardware and software prototypes for data-driven computing hardware capable of zetta-scale performance.

 

CSA is looking for a chiplet solution architect pushing frontiers of the chiplet solutions as a part of envisioned zetta-scale HPC/AI system. Imagine yourself at the center of our SOC design effort, collaborating with all fields, playing a strategic role of getting the key prototyping effort functional in a quick manner. This role provides opportunities to work with senior technical people from Principal Engineers to Fellows on a regular basis. If you have experience in clock and power management design and how they relate to digital timing closure, you will be applying this to systems using 2.5D and 3D packaging technologies.

 

The main responsibility of this role is to drive the design of chiplet-based architecture development:

  • System partitioning for 3D IC systems.
  • Design definition to establish 3DIC prototypes across market segments. Identify 3D architecture configurations and die partition for best System Co-optimization PPAC.
  • Develop concepts for chiplet-based system partitioning by 2.5D packaging and 3D stacking.
  • Thermal and Power Management of 3D IC systems.
  • Develop, enhance, and maintain system-level power analysis methodologies and flows.
  • Voltage regulation for 3D IC systems.
  • Specify /select system PMIC and on-die voltage regulators.
  • Work with multi-functional teams to optimize the design.
  • Ability to quickly react and adapt to changes.
  • Excellent communication skills.
  • Familiarity with CPU/GPU architecture is a big plus.

 

What we do for you

We offer you the opportunity to join one of the world’s premier research centers in nanotechnology at its headquarters in Leuven, Belgium. Candidates with current working rights in the UK are also welcome to work from our imec office in Cambridge, UK, and candidates with working rights in the US can work remotely from any location within the US. With your talent, passion and expertise, you’ll become part of a team that makes the impossible possible. Together, we shape the technology that will determine the society of tomorrow.

We are committed to being an inclusive employer and proud of our open, multicultural, and informal working environment with ample possibilities to take initiative and show responsibility. We commit to supporting and guiding you in this process; not only with words but also with tangible actions. Through imec.academy, ‘our corporate university’, we actively invest in your development to further your technical and personal growth. 

We are aware that your valuable contribution makes imec a top player in its field. Your energy and commitment are therefore appreciated by means of a market appropriate salary with many fringe benefits. 

 

Who you are

  • MS or PhD degree in computer or electrical engineering with at least 5 years of architecture, design and/or verification experience.
  • Domain expertise in SoC level low power design techniques and power management design.
  • 3D-IC timing sign-off.
  • Understanding of STA timing sign-off and ability to transfer to 2.5D and 3D systems.
  • Experience driving physical design EDA tools, design reference/sign-off flows in advanced process technologies, and EDA vendor engagement.
  • Understanding of advanced CMOS process, as well as 2.5D and 3D technologies.
  • The ability to make good judgements on functionality, performance, and physical implementation trade-offs.

 

“Nice To Have” Skills and Experience:

  • Understanding of fundamentals of CPU and compute system architecture.
  • Awareness of underlying transistor-level characteristics.
  • Experience with design and function of power converters and clock generators.
  • Strong communication skills are a pre-requisite since you will collaborate with many different groups.

 

Apply 

 

Please click here to apply.

 

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